1. Field of the Invention
The present invention relates to a package. More particularly, the present invention relates to a semiconductor package.
2. Description of Related Art
With rapid advance in technologies, integrated circuits (ICs) have been extensively used in our daily lives. Typically, IC manufacturing can be roughly classified into three main stages: a silicon wafer fabrication stage, an IC fabrication stage, and an IC package stage.
In current package structure, flipping a small chip on a large chip is a common package method. The large chip has solder pads on which solder balls are disposed for electrically connecting the package structure to the circuit board. Generally, the connecting area between the large chip and the small chip is filled with an underfill for protecting the conductive bumps between such chips. However, if the positions of the solder pads are too close to the position for filling the underfill, the underfill may overflow on the solder pads during the process of filling the underfill, which affects the electrically connecting status of the solders. Even the solders are disposed on the solder pads in advance, the underfill may overflow on the solders, which affects the electrically connecting status of the solders and other circuit boards.